Camden, NJ – Sr. Electrical Engineer – FPGA ASIC Designer Location: Camden, NJ (08103) Job ID: #60200 Duration: 3 – 6 mos Pay Rate: DOE – $ ph (W2) Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) Design Engineer will be part of the core design team, responsible for the architecture, implementation, verification/validation through Software integration test, for delivery of complex FPGAs AND/OR ASICs systems. Will develop architectures…